conference · 2003
Bottom-up methodology for test preparation and refinement
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- TL;DR
- A bottom-up testing methodology derives realistic layout-level fault lists, refines gate-level test patterns, and provides accurate switch-level test validation to evaluate fault coverage for likely circuit faults.
- Problem
- Not specified in the abstract.
- Method
- The approach applies a bottom-up testing methodology using software tools integrated within the ICD toolbox.
- Results
- The usefulness of the developed software tools is ascertained through several design examples.
- Contributions
- Not specified in the abstract.
- Limitations
- Not specified in the abstract.
- Takeaways
- The paper outlines interesting spin-offs of the proposed methodology alongside directions for future work.
- Applications
- Not specified in the abstract.
- Topics
- Not specified in the abstract.
- For industry
- Not specified in the abstract.
- Why it matters
- Not specified in the abstract.
Abstract
A bottom-up testing methodology is used to derive realistic fault lists (at layout level), to refine gate-level test patterns, and to provide accurate test validation (at switch-level), thus making possible the evaluation of the fault coverage of the most likely circuit faults. For this purpose, the developed software tools, which are integrated in the ICD toolbox, are described, and their usefulness is ascertained through several design examples. Interesting spin-offs of the proposed methodology and directions of future work are also described.< <ETX xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">></ETX>